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d a t a sh eet product speci?cation supersedes data of 2003 feb 13 2003 oct 14 integrated circuits tja1041 high speed can transceiver
2003 oct 14 2 philips semiconductors product speci?cation high speed can transceiver tja1041 features optimized for in-vehicle high speed communication fully compatible with the iso 11898 standard communication speed up to 1 mbit/s very low electromagnetic emission (eme) differential receiver with wide common-mode range, offering high electromagnetic immunity (emi) passive behaviour when supply voltage is off automatic i/o-level adaptation to the host controller supply voltage recessive bus dc voltage stabilization for further improvement of eme behaviour listen-only mode for node diagnosis and failure containment allows implementation of large networks (more than 110 nodes). low-power management very low-current in standby and sleep mode, with local and remote wake-up capability to power down the entire node, still allowing local and remote wake-up wake-up source recognition. protection and diagnosis (detection and signalling) txd dominant clamping handler with diagnosis rxd recessive clamping handler with diagnosis txd-to-rxd short-circuit handler with diagnosis over-temperature protection with diagnosis undervoltage detection on pins v cc , v i/o and v bat automotive environment transient protected bus pins and pin v bat short-circuit proof bus pins and pin split (to battery and to ground) bus line short-circuit diagnosis bus dominant clamping diagnosis cold start diagnosis (first battery connection). general description the tja1041 provides an advanced interface between the protocol controller and the physical bus in a controller area network (can) node. the tja1041 is primarily intended for automotive high-speed can applications (up to 1 mbit/s). the transceiver provides differential transmit capability to the bus and differential receive capability to the can controller. the tja1041 is fully compatible to the iso 11898 standard, and offers excellent emc performance, very low power consumption, and passive behaviour when supply voltage is off. the advanced features include: low-power management, supporting local and remote wake-up with wake-up source recognition and the capability to control the power supply in the rest of the node several protection and diagnosis functions including short circuits of the bus lines and first battery connection automatic adaptation of the i/o-levels, in line with the supply voltage of the controller. ordering information type number package name description version tja1041t so14 plastic small outline package; 14 leads; body width 3.9 mm sot108-1 tja1041u - bare die; 1930 3200 380 m m -
2003 oct 14 3 philips semiconductors product speci?cation high speed can transceiver tja1041 quick reference data symbol parameter conditions min. max. unit v cc dc voltage on pin v cc operating range 4.75 5.25 v v i/o dc voltage on pin v i/o operating range 2.8 5.25 v v bat dc voltage on pin v bat operating range 5 27 v i bat v bat input current v bat = 12 v 10 30 m a v canh dc voltage on pin canh 0 < v cc < 5.25 v; no time limit - 27 +40 v v canl dc voltage on pin canl 0 < v cc < 5.25 v; no time limit - 27 +40 v v split dc voltage on pin split 0 < v cc < 5.25 v; no time limit - 27 +40 v v esd electrostatic discharge voltage human body model (hbm) pins canh, canl and split - 6+6kv all other pins - 4+4kv t pd(txd-rxd) propagation delay txd to rxd v stb = 0 v 40 255 ns t vj virtual junction temperature - 40 +150 c
2003 oct 14 4 philips semiconductors product speci?cation high speed can transceiver tja1041 block diagram handbook, full pagewidth tja1041 wake txd en 5 1 6 14 9 8 4 2 310 7 13 12 11 stb err v i/o rxd mgu166 wake comparator level adaptor time-out v i/o gnd v cc v bat v bat v cc v bat v cc rxd recessive detection temperature protection driver split split canl canh inh normal receiver low power receiver mode control + failure detector + wake-up detector v i/o fig.1 block diagram.
2003 oct 14 5 philips semiconductors product speci?cation high speed can transceiver tja1041 pinning symbol pin description txd 1 transmit data input gnd 2 ground v cc 3 transceiver supply voltage input rxd 4 receive data output; reads out data from the bus lines v i/o 5 i/o-level adapter voltage input en 6 enable control input inh 7 inhibit output for switching external voltage regulators err 8 error and power-on indication output (active low) wake 9 local wake-up input v bat 10 battery voltage input split 11 common-mode stabilization output canl 12 low-level can bus line canh 13 high-level can bus line stb 14 standby control input (active low) handbook, halfpage tja1041t mgu165 1 2 3 4 5 6 7 txd gnd v cc rxd v i/o en inh stb canh canl split v bat wake err 14 13 12 11 10 9 8 fig.2 pinning configuration. functional description the primary function of a can transceiver is to provide the can physical layer as described in the iso 11898 standard. in the tja1041 this primary function is complemented with a number of operating modes, fail-safe features and diagnosis features, which offer enhanced system reliability and advanced power management functionality. operating modes the tja1041 can be operated in five modes, each with specific features. control pins stb and en select the operating mode. changing between modes also gives access to a number of diagnostics flags, available via pin err. the following sections describe the five operating modes. table 1 shows the conditions for selecting these modes. figure 3 illustrates the mode transitions when v cc , v i/o and v bat are present.
2003 oct 14 6 philips semiconductors product speci?cation high speed can transceiver tja1041 table 1 operating mode selection notes 1. setting the pwon flag or the wake-up flag will clear the uv nom flag. 2. the transceiver directly enters sleep mode and pin inh is set floating when the uv nom flag is set (so after the undervoltage detection time on either v cc or v i/o has elapsed before that voltage level has recovered). 3. when go-to-sleep command mode is selected for longer than the minimum hold time of the go-to-sleep command, the transceiver will enter sleep mode and pin inh is set floating. 4. on entering normal mode the pwon flag and the wake-up flag will be cleared. control pins internal flags operating mode pin inh stb en uv nom uv bat pwon, wake-up x x set x x (1) sleep mode; note 2 ?oating cleared set one or both set standby mode h both cleared no change from sleep mode ?oating standby mode from any other mode h l l cleared cleared one or both set standby mode h both cleared no change from sleep mode ?oating standby mode from any other mode h l h cleared cleared one or both set standby mode h both cleared no change from sleep mode ?oating go-to-sleep command mode from any other mode; note 3 h (3) h l cleared cleared x pwon/listen-only mode h h h cleared cleared x normal mode; note 4 h
2003 oct 14 7 philips semiconductors product speci?cation high speed can transceiver tja1041 handbook, full pagewidth mgu983 standby mode normal mode go-to-sleep command mode legend: = h, = l flag set flags cleared logical state of pin setting pwon and/or wake-up flag pwon and wake-up flag both cleared sleep mode pwon / listen- only mode flags cleared and t > t h(min) stb = h and en = h and uv nom cleared stb = h and en = l and uv nom cleared stb = l and flag set stb = l and (en = l or flag set) stb = l and en = h and flags cleared stb = h and en = h stb = h and en = l stb = l and (en = l or flag set) stb = l and en = h and flags cleared stb = l and en = h stb = h and en = h stb = l and en = l stb = h and en = l stb = h and en = h stb = h and en = l fig.3 mode transitions when v cc , v i/o and v bat are present. n ormal mode normal mode is the mode for normal bi-directional can communication. the receiver will convert the differential analog bus signal on pins canh and canl into digital data, available for output to pin rxd. the transmitter will convert digital data on pin txd into a differential analog signal, available for output to the bus pins. the bus pins are biased at 0.5v cc (via r i(cm) ). pin inh is active, so voltage regulators controlled by pin inh (see fig.4) will be active too. p won / listen - only mode in pwon/listen-only mode the transmitter of the transceiver is disabled, effectively providing a transceiver listen-only behaviour. the receiver will still convert the analog bus signal on pins canh and canl into digital data, available for output to pin rxd. as in normal mode the bus pins are biased at 0.5v cc , and pin inh remains active. s tandby mode the standby mode is the first-level power saving mode of the transceiver, offering reduced current consumption. in standby mode the transceiver is not able to transmit or receive data and the low-power receiver is activated to monitor bus activity. the bus pins are biased at ground level (via r i(cm) ). pin inh is still active, so voltage regulators controlled by this pin inh will be active too.
2003 oct 14 8 philips semiconductors product speci?cation high speed can transceiver tja1041 pins rxd and err will reflect any wake-up requests (provided that v i/o and v cc are present). g o - to - sleep command mode the go-to-sleep command mode is the controlled route for entering sleep mode. in go-to-sleep command mode the transceiver behaves as if in standby mode, plus a go-to-sleep command is issued to the transceiver. after remaining in go-to-sleep command mode for the minimum hold time (t h(min) ), the transceiver will enter sleep mode. the transceiver will not enter the sleep mode if the state of pins stb or en is changed or the uv bat , pwon or wake-up flag is set before t h(min) has expired. s leep mode the sleep mode is the second-level power saving mode of the transceiver. sleep mode is entered via the go-to-sleep command mode, and also when the undervoltage detection time on either v cc or v i/o elapses before that voltage level has recovered. in sleep mode the transceiver still behaves as described for standby mode, but now pin inh is set floating. voltage regulators controlled by pin inh will be switched off, and the current into pin v bat is reduced to a minimum. waking up a node from sleep mode is possible via the wake-up flag and (as long as the uv nom flag is not set) via pin stb. internal ?ags the tja1041 makes use of seven internal flags for its fail-safe fallback mode control and system diagnosis support. table 1 shows the relation between flags and operating modes of the transceiver. five of the internal flags can be made available to the controller via pin err. table 2 shows the details on how to access these flags. the following sections describe the seven internal flags. table 2 accessing internal ?ags via pin err notes 1. pin err is an active-low output, so a low level indicates a set flag and a high level indicates a cleared flag. allow pin err to stabilize for at least 8 m s after changing operating modes. 2. allow for a txd dominant time of at least 4 m s per dominant-recessive cycle. internal ?ag flag is available on pin err (1) flag is cleared uv nom no by setting the pwon or wake-up ?ag uv bat no when v bat has recovered pwon in pwon/listen-only mode (coming from standby mode, go-to-sleep command mode, or sleep mode) on entering normal mode wake-up in standby mode, go-to-sleep command mode, and sleep mode (provided that v i/o and v cc are present) on entering normal mode, or by setting the pwon or uv nom ?ag wake-up source in normal mode (before the fourth dominant to recessive edge on pin txd; note 2) on leaving normal mode, or by setting the pwon ?ag bus failure in normal mode (after the fourth dominant to recessive edge on pin txd; note 2) on re-entering normal mode local failure in pwon/listen-only mode (coming from normal mode) on entering normal mode or when rxd is dominant while txd is recessive (provided that all local failures are resolved)
2003 oct 14 9 philips semiconductors product speci?cation high speed can transceiver tja1041 uv nom flag uv nom is the v cc and v i/o undervoltage detection flag. the flag is set when the voltage on pin v cc drops below v cc(sleep) for longer than t uv(vcc) or when the voltage on pin v i/o drops below v i/o(sleep) for longer than t uv(vi/o) . when the uv nom flag is set, the transceiver will enter sleep mode to save power and not disturb the bus. in sleep mode the voltage regulators connected to pin inh are disabled, avoiding the extra power consumption in case of a short-circuit condition. after a waiting time (fixed by the same timers used for setting uv nom ) any wake-up request or setting of the pwon flag will clear uv nom and the timers, allowing the voltage regulators to be reactivated at least until uv nom is set again. uv bat flag uv bat is the v bat undervoltage detection flag. the flag is set when the voltage on pin v bat drops below v bat(stb) . when uv bat is set, the transceiver will try to enter standby mode to save power and not disturb the bus. uv bat is cleared when the voltage on pin v bat has recovered. the transceiver will then return to the operating mode determined by the logic state of pins stb and en. p won flag pwon is the v bat power-on flag. this flag is set when the voltage on pin v bat has recovered after it dropped below v bat(pwon) , particularly after the transceiver was disconnected from the battery. by setting the pwon flag, the uv nom flag and timers are cleared and the transceiver cannot enter sleep mode. this ensures that any voltage regulator connected to pin inh is activated when the node is reconnected to the battery. in pwon/listen-only mode the pwon flag can be made available on pin err. the flag is cleared when the transceiver enters normal mode. w ake - up flag the wake-up flag is set when the transceiver detects a local or a remote wake-up request. a local wake-up request is detected when a logic state change on pin wake remains stable for at least t wake . a remote wake-up request is detected when the bus remains in dominant state for at least t bus . the wake-up flag can only be set in standby mode, go-to-sleep command mode or sleep mode. setting of the flag is blocked during the uv nom flag waiting time. by setting the wake-up flag, the uv nom flag and timers are cleared. the wake-up flag is immediately available on pins err and rxd (provided that v i/o and v cc are present). the flag is cleared at power-on, or when the uv nom flag is set or the transceiver enters normal mode. w ake - up source flag wake-up source recognition is provided via the wake-up source flag, which is set when the wake-up flag is set by a local wake-up request via pin wake. the wake-up source flag can only be set after the pwon flag is cleared. in normal mode the wake-up source flag can be made available on pin err. the flag is cleared at power-on or when the transceiver leaves normal mode. b us failure flag the bus failure flag is set if the transceiver detects a bus line short-circuit condition to v bat ,v cc or gnd during four consecutive dominant-recessive cycles on pin txd, when trying to drive the bus lines dominant. in normal mode the bus failure flag can be made available on pin err. the flag is cleared when the transceiver re-enters normal mode. l ocal failure flag in normal mode or pwon/listen-only mode the transceiver can recognize five different local failures, and will combine them into one local failure flag. the five local failures are: txd dominant clamping, rxd recessive clamping, a txd-to-rxd short circuit, bus dominant clamping, and over-temperature. nature and detection of these local failures is described in section local failures. in pwon/listen-only mode the local failure flag can be made available on pin err. the flag is cleared when entering normal mode or when rxd is dominant while txd is recessive, provided that all local failures are resolved. local failures the tja1041 can detect five different local failure conditions. any of these failures will set the local failure flag, and in most cases the transmitter of the transceiver will be disabled. the following sections give the details. txd dominant clamping detection a permanent low level on pin txd (due to a hardware or software application failure) would drive the can bus into a permanent dominant state, blocking all network communication. the txd dominant time-out function prevents such a network lock-up by disabling the transmitter of the transceiver if pin txd remains at a low level for longer than the txd dominant time-out t dom(txd) . the t dom(txd) timer defines the minimum possible bit rate
2003 oct 14 10 philips semiconductors product speci?cation high speed can transceiver tja1041 of 40 kbit/s. the transmitter remains disabled until the local failure flag is cleared. rxd recessive clamping detection an rxd pin clamped to high level will prevent the controller connected to this pin from recognizing a bus dominant state. so the controller can start messages at any time, which is likely to disturb all bus communication. rxd recessive clamping detection prevents this effect by disabling the transmitter when the bus is in dominant state without rxd reflecting this. the transmitter remains disabled until the local failure flag is cleared. txd- to -rxd short - circuit detection a short-circuit between pins rxd and txd would keep the bus in a permanent dominant state once the bus is driven dominant, because the low-side driver of rxd is typically stronger than the high-side driver of the controller connected to txd. the txd-to-rxd short-circuit detection prevents such a network lock-up by disabling the transmitter. the transmitter remains disabled until the local failure flag is cleared. b us dominant clamping detection a can bus short circuit (to v bat ,v cc or gnd) or a failure in one of the other network nodes could result in a differential voltage on the bus high enough to represent a bus dominant state. because a node will not start transmission if the bus is dominant, the normal bus failure detection will not detect this failure, but the bus dominant clamping detection will. the local failure flag is set if the dominant state on the bus persists for longer than t dom(bus) . by checking this flag, the controller can determine if a clamped bus is blocking network communication. there is no need to disable the transmitter. note that the local failure flag does not retain a bus dominant clamping failure, and is released as soon as the bus returns to recessive state. o ver - temperature detection to protect the output drivers of the transceiver against overheating, the transmitter will be disabled if the virtual junction temperature exceeds the shutdown junction temperature t j(sd) . the transmitter remains disabled until the local failure flag is cleared. recessive bus voltage stabilization in recessive state the output impedance of transceivers is relatively high. in a partially powered network (supply voltage is off in some of the nodes) any deactivated transceiver with a significant leakage current is likely to load the recessive bus to ground. this will cause a common-mode voltage step each time transmission starts, resulting in increased electromagnetic emission (eme). using pin split of the tja1041 in combination with split termination (see fig.5) will reduce this step effect. in normal mode and pwon/listen-only mode pin split provides a stabilized 0.5v cc dc voltage. in standby mode, go-to-sleep command mode and sleep mode pin split is set floating. i/o level adapter the tja1041 is equipped with a built-in i/o-level adapter. by using the supply voltage of the controller (to be supplied at pin v i/o ) the level adapter ratio-metrically scales the i/o-levels of the transceiver. for pins txd, stb and en the digital input threshold level is adjusted, and for pins rxd and err the high-level output voltage is adjusted. this allows the transceiver to be directly interfaced with controllers on supply voltages between 2.8 v and 5.25 v, without the need for glue logic. pin wake pin wake of the tja1041 allows local wake-up triggering by a low to high state change as well as a high to low state change. this gives maximum flexibility when designing a local wake-up circuit. to keep current consumption at a minimum, after a t wake delay the internal bias voltage of pin wake will follow the logic state of this pin. a high level on pin wake is followed by an internal pull-up to v bat . a low level on pin wake is followed by an internal pull-down towards gnd. to ensure emi performance in applications not using local wake-up it is recommended to connect pin wake to pin v bat or to pin gnd.
2003 oct 14 11 philips semiconductors product speci?cation high speed can transceiver tja1041 limiting values in accordance with the absolute maximum rating system (iec 60134). notes 1. equivalent to discharging a 100 pf capacitor via a 1.5 k w series resistor. 2. equivalent to discharging a 200 pf capacitor via a 0.75 m h series inductor and a 10 w series resistor. 3. junction temperature in accordance with iec 60747-1. an alternative definition is: t vj =t amb +p r th(vj-amb) , where r th(vj-amb) is a fixed value. the rating for t vj limits the allowable combinations of power dissipation (p) and ambient temperature (t amb ). thermal characteristics symbol parameter conditions min. max. unit v cc dc voltage on pin v cc no time limit - 0.3 +6 v operating range 4.75 5.25 v v i/o dc voltage on pin v i/o no time limit - 0.3 +6 v operating range 2.8 5.25 v v bat dc voltage on pin v bat no time limit - 0.3 +40 v operating range 5 27 v load dump - 40 v v txd dc voltage on pin txd - 0.3 v i/o + 0.3 v v rxd dc voltage on pin rxd - 0.3 v i/o + 0.3 v v stb dc voltage on pin stb - 0.3 v i/o + 0.3 v v en dc voltage on pin en - 0.3 v i/o + 0.3 v v err dc voltage on pin err - 0.3 v i/o + 0.3 v v inh dc voltage on pin inh - 0.3 v bat + 0.3 v v wake dc voltage on pin wake - 0.3 v bat + 0.3 v i wake dc current on pin wake -- 15 ma v canh dc voltage on pin canh 0 < v cc < 5.25 v; no time limit - 27 +40 v v canl dc voltage on pin canl 0 < v cc < 5.25 v; no time limit - 27 +40 v v split dc voltage on pin split 0 < v cc < 5.25 v; no time limit - 27 +40 v v trt transient voltages on pins canh, canl, split and v bat according to iso 7637; see fig.6 - 200 +200 v v esd electrostatic discharge voltage human body model (hbm); note 1 pins canh, canl and split - 6+6 kv all other pins - 4+4 kv machine model (mm); note 2 - 200 +200 v t vj virtual junction temperature note 3 - 40 +150 c t stg storage temperature - 55 +150 c symbol parameter conditions value unit r th(j-a) thermal resistance from junction to ambient in so14 package in free air 120 k/w r th(j-s) thermal resistance from junction to substrate of bare die in free air 40 k/w
2003 oct 14 12 philips semiconductors product speci?cation high speed can transceiver tja1041 quality specification quality specification in accordance with aec-q100 . characteristics v cc = 4.75 to 5.25 v; v i/o = 2.8 v to v cc ; v bat = 5 to 27 v; r l =60 w; t vj = - 40 to +150 c; unless speci?ed otherwise; all voltages are de?ned with respect to ground; positive currents ?ow into the device; note 1. symbol parameter conditions min. typ. max. unit supplies (pins v bat , v cc and v i/o ) v cc(sleep) v cc undervoltage detection level for forced sleep mode v bat = 12 v (fail-safe) 2.75 3.3 4.5 v v i/o(sleep) v i/o undervoltage detection level for forced sleep mode 0.5 1.5 2 v v bat(stb) v bat voltage level for fail-safe fallback mode v cc = 5 v (fail-safe) 2.75 3.3 4.5 v v bat(pwon) v bat voltage level for setting pwon ?ag v cc = 0 v 2.5 3.3 4.1 v i cc v cc input current normal mode; v txd =0v (dominant) 25 55 80 ma normal or pwon/listen-only mode; v txd =v i/o (recessive) 2 6 10 ma standby or sleep mode - 110 m a i i/o v i/o input current normal mode; v txd =0v (dominant) 100 350 1000 m a normal or pwon/listen-only mode; v txd =v i/o (recessive) 15 80 200 m a standby or sleep mode - 05 m a i bat v bat input current normal or pwon/listen-only mode 15 30 40 m a standby mode; v cc > 4.75 v; v i/o = 2.8 v; v inh =v wake =v bat =12v 10 20 30 m a sleep mode; v inh =v cc =v i/o =0v; v wake =v bat =12v 10 20 30 m a transmitter data input (pin txd) v ih high-level input voltage 0.7v i/o - v cc + 0.3 v v il low-level input voltage - 0.3 - 0.3v i/o v i ih high-level input current normal or pwon/listen-only mode; v txd =v i/o - 50 +5 m a i il low-level input current normal or pwon/listen-only mode; v txd = 0.3v i/o - 70 - 250 - 500 m a c i input capacitance not tested - 510pf
2003 oct 14 13 philips semiconductors product speci?cation high speed can transceiver tja1041 receiver data output (pin rxd) i oh high-level output current v rxd =v i/o - 0.4 v; v i/o =v cc - 1 - 3 - 6ma i ol low-level output current v rxd = 0.4 v; v txd =v i/o ; bus dominant 2 5 12 ma standby and enable control inputs (pins stb and en) v ih high-level input voltage 0.7v i/o - v cc + 0.3 v v il low-level input voltage - 0.3 - 0.3v i/o v i ih high-level input current v stb =v en = 0.7v i/o 14 10 m a i il low-level input current v stb =v en =0v - 0 - 1 m a error and power-on indication output (pin err) i oh high-level output current v err =v i/o - 0.4 v; v i/o =v cc - 4 - 20 - 50 m a i ol low-level output current v err = 0.4 v 0.1 0.2 0.35 ma local wake-up input (pin wake) i ih high-level input current v wake =v bat - 1.9 v - 1 - 5 - 10 m a i il low-level input current v wake =v bat - 3.1 v 1 5 10 m a v th threshold voltage v stb =0v v bat - 3v bat - 2.5 v bat - 2v inhibit output (pin inh) d v h high-level voltage drop i inh = - 0.18 ma 0.05 0.2 0.8 v ? i l ? leakage current sleep mode - 05 m a bus lines (pins canh and canl) v o(dom) dominant output voltage v txd =0v pin canh 3 3.6 4.25 v pin canl 0.5 1.4 1.75 v v o(dom)(m) matching of dominant output voltage (v cc - v canh - v canl ) - 0.1 - +0.15 v v o(dif)(bus) differential bus output voltage (v canh - v canl ) v txd = 0 v (dominant); 45 w 2003 oct 14 14 philips semiconductors product speci?cation high speed can transceiver tja1041 v dif(th) differential receiver threshold voltage normal or pwon/listen-only mode (see fig.7); - 12v 0.9 v 300 600 1000 m s symbol parameter conditions min. typ. max. unit
2003 oct 14 15 philips semiconductors product speci?cation high speed can transceiver tja1041 note 1. all parameters are guaranteed over the virtual junction temperature range by design, but only 100% tested at t amb = 125 c for dies on wafer level and in addition to this, 100% tested at t amb = 125 c for cased products, unless speci?ed otherwise. for bare dies, all parameters are only guaranteed with the reverse side of the die connected to ground. t h(min) minimum hold time of go-to-sleep command 20 35 50 m s t bus dominant time for wake-up via bus standby or sleep mode; v bat =12v 0.75 1.75 5 m s t wake minimum wake-up time after receiving a falling or rising edge standby or sleep mode; v bat =12v 525 50 m s thermal shutdown t j(sd) shutdown junction temperature 155 165 180 c symbol parameter conditions min. typ. max. unit test and application information handbook, full pagewidth split can bus wires tja1041 micro- controller wake v i/o inh v bat v cc v cc port x, y, z rxd txd stb gnd canl canh mgu173 en txd rxd err 5 v bat 3 v fig.4 typical application with 3 v microcontroller.
2003 oct 14 16 philips semiconductors product speci?cation high speed can transceiver tja1041 handbook, full pagewidth gnd v cc v split = 0.5v cc in normal mode and pwon/listen-only mode; otherwise floating tja1041 split 60 w 60 w r r mgu169 v split canh canl fig.5 stabilization circuitry and application. handbook, full pagewidth mgw337 10 m f 1 nf 1 nf transient generator 100 nf 47 m f + 5 v + 12 v tja1041 wake txd en 5 1 6 14 9 500 khz 8 4 2 310 7 13 12 11 stb err rxd v i/o gnd v cc v bat split canl canh inh fig.6 test circuit for automotive transients. the waveforms of the applied transients will be in accordance with iso 7637 part 1, test pulses 1, 2, 3a, 3b, 5, 6 and 7.
2003 oct 14 17 philips semiconductors product speci?cation high speed can transceiver tja1041 handbook, full pagewidth mgs378 v rxd high low hysteresis 0.5 0.9 v i(dif)(bus) (v) fig.7 hysteresis of the receiver. handbook, full pagewidth mgw338 10 m f 15 pf 100 nf 47 m f c l 100 pf r l 60 w + 5 v + 12 v tja1041 wake txd en 5 1 6 14 9 8 4 2 310 7 13 12 11 stb err rxd v i/o gnd v cc v bat split canl canh inh fig.8 test circuit for timing characteristics.
2003 oct 14 18 philips semiconductors product speci?cation high speed can transceiver tja1041 handbook, full pagewidth mgs377 t d(txd-buson) t pd ( txd-rxd ) t pd ( txd-rxd ) 0.3v cc 0.7v cc 0.9 v 0.5 v high low canh txd rxd canl v i(dif)(bus) (1) high recessive (bus off) dominant (bus on) low t d(txd-busoff) t d(buson-rxd) t d(busoff-rxd) fig.9 timing diagram. (1) v i(dif)(bus) =v canh - v canl . bonding pad locations note 1. all x/y coordinates represent the position of the centre of each pad (in m m) with respect to the left hand bottom corner of the top aluminium layer. symbol pad coordinates (1) xy txd 1 664.25 3004.5 gnd 2 75.75 3044.25 v cc 3 115.5 2573 rxd 4 115.5 1862.75 v i/o 5 115.5 115.5 en 6 264.5 114 inh 7 667.75 85 err 8 1076.75 115.5 wake 9 1765 85 v bat 10 1765 792.5 split 11 1765 1442.25 canl 12 1765 2115 canh 13 1751 3002.5 stb 14 940.75 3004.5 mgu984 handbook, halfpage tja1041u 67 8 9 10 11 12 13 2 3 4 5 14 1 y x 0 0 fig.10 bonding pad locations. the reverse side of the bare die must be connected to ground.
2003 oct 14 19 philips semiconductors product speci?cation high speed can transceiver tja1041 package outline unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 sot108-1 x w m q a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 7 8 1 14 y 076e06 ms-012 pin 1 index 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.35 0.34 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.024 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 99-12-27 03-02-19 0 2.5 5 mm scale so14: plastic small outline package; 14 leads; body width 3.9 mm sot108-1
2003 oct 14 20 philips semiconductors product speci?cation high speed can transceiver tja1041 soldering introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering can still be used for certain surface mount ics, but it is not suitable for fine pitch smds. in these situations reflow soldering is recommended. re?ow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing. several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical reflow peak temperatures range from 215 to 270 c depending on solder paste material. the top-surface temperature of the packages should preferably be kept: below 220 c (snpb process) or below 245 c (pb-free process) C for all bga and ssop-t packages C for packages with a thickness 3 2.5 mm C for packages with a thickness < 2.5 mm and a volume 3 350 mm 3 so called thick/large packages. below 235 c (snpb process) or below 260 c (pb-free process) for packages with a thickness < 2.5 mm and a volume < 350 mm 3 so called small/thin packages. moisture sensitivity precautions, as indicated on packing, must be respected at all times. wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time of the leads in the wave ranges from 3 to 4 seconds at 250 c or 265 c, depending on solder material applied, snpb or pb-free respectively. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
2003 oct 14 21 philips semiconductors product speci?cation high speed can transceiver tja1041 suitability of surface mount ic packages for wave and re?ow soldering methods notes 1. for more detailed information on the bga packages refer to the (lf)bga application note (an01026); order a copy from your philips semiconductors sales office. 2. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . 3. these transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 c 10 c measured in the atmosphere of the reflow oven. the package body peak temperature must be kept as low as possible. 4. these packages are not suitable for wave soldering. on versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. on versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 5. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 6. wave soldering is suitable for lqfp, tqfp and qfp packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 7. wave soldering is suitable for ssop, tssop, vso and vssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 8. hot bar or manual soldering is suitable for pmfp packages. revision history package (1) soldering method wave reflow (2) bga, lbga, lfbga, sqfp, ssop-t (3) , tfbga, vfbga not suitable suitable dhvqfn, hbcc, hbga, hlqfp, hsqfp, hsop, htqfp, htssop, hvqfn, hvson, sms not suitable (4) suitable plcc (5) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (5)(6) suitable ssop, tssop, vso, vssop not recommended (7) suitable pmfp (8) not suitable not suitable rev date cpcn description 4 20031014 200307014 product speci?cation (9397 750 11838) modi?cation: change v dif(th) = 0.5 v in standby or sleep mode into v dif(th) = 0.4 v change provided that v i/o is present into provided that v i/o and v cc are present add chapter quality specification add chapter revision history 3 20030213 - product speci?cation (9397 750 10785)
2003 oct 14 22 philips semiconductors product speci?cation high speed can transceiver tja1041 data sheet status notes 1. please consult the most recently issued data sheet before initiating or completing a design. 2. the product status of the device(s) described in this data sheet may have changed since this data sheet was published. the latest information is available on the internet at url http://www.semiconductors.philips.com. 3. for data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. level data sheet status (1) product status (2)(3) definition i objective data development this data sheet contains data from the objective speci?cation for product development. philips semiconductors reserves the right to change the speci?cation in any manner without notice. ii preliminary data quali?cation this data sheet contains data from the preliminary speci?cation. supplementary data will be published at a later date. philips semiconductors reserves the right to change the speci?cation without notice, in order to improve the design and supply the best possible product. iii product data production this data sheet contains data from the product speci?cation. philips semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. relevant changes will be communicated via a customer product/process change noti?cation (cpcn). definitions short-form specification ? the data in a short-form specification is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values definition ? limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the specification is not implied. exposure to limiting values for extended periods may affect device reliability. application information ? applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. disclaimers life support applications ? these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes ? philips semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. when the product is in full production (status production), relevant changes will be communicated via a customer product/process change notification (cpcn). philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2003 oct 14 23 philips semiconductors product speci?cation high speed can transceiver tja1041 bare die ? all die are tested and are guaranteed to comply with all data sheet limits up to the point of wafer sawing for a period of ninety (90) days from the date of philips' delivery. if there are data sheet limits not guaranteed, these will be separately indicated in the data sheet. there are no post packing tests performed on individual die or wafer. philips semiconductors has no control of third party procedures in the sawing, handling, packing or assembly of the die. accordingly, philips semiconductors assumes no liability for device functionality or performance of the die or systems after third party sawing, handling, packing or assembly of the die. it is the responsibility of the customer to test and qualify their application in which the die is used.
? koninklijke philips electronics n.v. 2003 sca75 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. philips semiconductors C a worldwide company contact information for additional information please visit http://www.semiconductors.philips.com . fax: +31 40 27 24825 for sales of?ces addresses send e-mail to: sales.addresses@www.semiconductors.philips.com . printed in the netherlands r16/04/pp 24 date of release: 2003 oct 14 document order number: 9397 750 11838

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